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Bump rc chisel firrtl 3.4.1.x #742

Merged
merged 14 commits into from
Dec 26, 2020
Merged

Bump rc chisel firrtl 3.4.1.x #742

merged 14 commits into from
Dec 26, 2020

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timsnyder-siv
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I know that we just bumped to Chisel 3.4 in #719. However, there have been some bugfixes in Chisel/Firrtl and feature changes in RC since the versions from November that I'd like you guys to pick up. Starting a branch of Chipyard because there are some small fixes that need to be made across the repos.

Related issue:

Type of change: bug fix | new feature | other enhancement

Impact: rtl change | software change | unknown | other

Release Notes

timsnyder and others added 3 commits December 18, 2020 18:00
Bump to pre-merge chipsalliance/rocket-chip#2764 to get it
going while picking up the chisel/firrtl bugfixes in 3/1.4.1+
non-master pre-merge bump
timsnyder-siv added a commit to timsnyder-siv/rocket-chip that referenced this pull request Dec 22, 2020
Creating an intermediate commit for ucb-bar/chipyard#716 to use for CI
until ucb-bar/chipyard#742 is merged and this bump will be subsumed by
the larger bump.
@timsnyder-siv
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Looks like once we have all of the submodule PR's merged, CI will be passing.

@jerryz123
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Since chipsalliance/rocket-chip#2764 is marked as "SQUASH & MERGE WITH MERGIFY", there will need to be one more RC bump after that PR is merged.

@jerryz123
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jerryz123 commented Dec 26, 2020

NVM it looks like the RC PR wasn't squashed, it was just merged.
Everything here LGTM.

Thanks @timsnyder-siv

@jerryz123 jerryz123 self-requested a review December 26, 2020 22:41
@jerryz123 jerryz123 merged commit 6b0d57d into dev Dec 26, 2020
@jerryz123 jerryz123 mentioned this pull request Jan 1, 2021
davidbiancolin pushed a commit to firesim/firesim that referenced this pull request Jan 18, 2021
@jerryz123 jerryz123 deleted the bump-rc-chisel-firrtl-3.4.1.x branch October 1, 2022 02:09
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3 participants